EEE U111 · First-time lesson · Module 2 · Lectures 4–8

Circuit analysis, taught from zero

Bobrow & Gupta (Asian ed.) §2.1–2.6 — the two systematic methods that solve any circuit (nodal and mesh), and the five theorems that let you replace whole circuits with tiny equivalents. Budget 90 minutes; this is the heart of the course.

How to use this page

First time → this page, in order, attempting every green check before opening it. Revising → the notes page: compressed map, fully worked examples with power audits, and the trap list. This module is new to the entire hall — no school board teaches nodal analysis or Thevenin. It's also the module the rest of the course quietly reuses forever: transients, AC, and transistor circuits all start by simplifying a network with exactly these tools. The only prerequisite beyond Module 1 is solving two or three simultaneous linear equations without drama.

One thing to check before you start: if looking at a circuit diagram and working out which points are connected to which still feels effortful, do Reading a circuit diagram first (45 min). Nodal analysis begins with "label every node," and that step has to be automatic or the rest of this page will feel much harder than it is.

1 · Why you need a method, not cleverness

Module 1 solved circuits by spotting things: "it's one loop, so KVL gives the current." That works until the circuit has three loops and five nodes, and every path you stare at tangles into another. The fix is what engineering always does when cleverness stops scaling: a procedure that works every time, without insight.

Both procedures in this module do the same thing under the hood — they choose a small set of unknowns that automatically respect one of Kirchhoff's laws, then use the other law to generate exactly enough equations. Solve the simultaneous equations; every voltage and current in the circuit falls out.

Nodal analysisMesh analysis
UnknownsNode voltages v₁, v₂, …Mesh (loop) currents i₁, i₂, …
Law that's automaticKVL (voltages are differences of node voltages)KCL (loop currents flow in closed rings)
Law you writeKCL at each nodeKVL around each mesh
Happiest withCurrent sourcesVoltage sources

2 · Nodal analysis: give every junction a height §2.1–2.2

The idea in one image: voltage is like height, so pick one node as sea level — call it the reference, or ground, 0 V — and label every other node with its height above sea level: v₁, v₂, … Those are your only unknowns. Any element's voltage is then just a difference of two heights, which is why KVL is automatically satisfied — walk any loop of heights and you return to your starting height by arithmetic alone.

The recipe:

  1. Choose ground (pick the node with the most connections — fewer terms later).
  2. Label the other node voltages.
  3. Write KCL at each labelled node, expressing every resistor current with Ohm's law: the current flowing from node a to node b through R is (va − vb)/R — my height minus yours, over the resistance.
  4. Solve the simultaneous equations.

Let's work one properly. Here it is — and notice the ground symbol has already been placed on the bottom rail, so that whole rail is our 0 V reference and only two node voltages are unknown:

6 A 1 A 2 Ω 4 Ω 2 Ω v₁ v₂ 0 V
Two unknown node voltages, so two KCL equations. Note both current sources: the 6 A arrow points into v₁, the 1 A arrow points down and out of v₂. Arrow direction is the whole story with current sources.

Now write KCL at each labelled node. Read every term straight off the picture:

Node 1 — in = out: 6 = v₁/2 + (v₁ − v₂)/2. (Into the node: the 6 A. Out: down to ground, and across to node 2.)

Node 2 — in = out: (v₁ − v₂)/2 = v₂/4 + 1. (In: the current arriving from node 1. Out: down to ground, and the 1 A the source removes.)

Clear fractions (×2 and ×4) and tidy: 2v₁ − v₂ = 12 and 2v₁ − 3v₂ = 4. Subtract: 2v₂ = 8 → v₂ = 4 V, then v₁ = 8 V. Every current now falls out by Ohm's law: 4 A down the first 2 Ω, 2 A across, 1 A down the 4 Ω — and KCL holds at both nodes by inspection. (The notes page reruns this with the full power audit.)

One wrinkle: voltage sources in a nodal problem. If a source connects a node to ground, it's a gift — that node's voltage is simply known, one unknown gone. If it floats between two non-ground nodes, the standard move is the supernode: treat the two nodes as one island for KCL, and add the source's equation va − vb = V to the system. Know the idea; drill it on the tutorial sheet.

Check yourself: a 2 A source feeds a single node with 3 Ω and 6 Ω to ground. Find the node voltage by writing one KCL equation.

KCL: 2 = v/3 + v/6 = v/2 → v = 4 V. (Sanity: 3∥6 = 2 Ω, and 2 A × 2 Ω = 4 V — same answer through Module 1 eyes.)

3 · Mesh analysis: currents that go in rings §2.3

The dual method. A mesh is a minimal "window pane" loop of the circuit. Assign each mesh its own circulating current — all clockwise, always, no exceptions (consistency is the whole game) — and those are your unknowns. KCL is now automatic: a loop current enters and leaves every node it touches. You write KVL once around each mesh.

The one subtlety worth slowing down for: an element on the border between two meshes carries both loop currents at once — its actual current is the difference. Walking around mesh 1, the shared resistor's drop is R(i₁ − i₂); walking mesh 2 it's R(i₂ − i₁) — my current minus the neighbour's, always from the perspective of the mesh you're walking.

Here is the worked example — two window panes side by side, sharing the middle branch. Both mesh currents are drawn clockwise, because they always are:

+− +− i₁ i₂ 20 V 9 V 2 Ω 3 Ω 4 Ω shared branch: carries both
Both loop arrows clockwise, always. The 4 Ω on the border belongs to both meshes — that shared branch is where nearly every mesh-analysis sign error is born, so read the next two equations slowly.

Mesh 1 (walk clockwise): rise 20, drop 2i₁, drop 4(i₁ − i₂): 20 = 6i₁ − 4i₂.

Mesh 2 (walk clockwise): drop 4(i₂ − i₁), drop 3i₂, drop 9: 4(i₂ − i₁) + 3i₂ + 9 = 0 → 7i₂ = 4i₁ − 9.

Substitute and solve: i₁ = 4 A, i₂ = 1 A (algebra unpacked on the notes page), so the shared 4 Ω carries 4 − 1 = 3 A downward. The 9 V source absorbs power — current is being pushed into its + terminal, a battery being charged, exactly like Module 1's example 1.

The wrinkle here is the mirror of nodal's: a current source on a mesh border fixes the difference of two mesh currents (the supermesh idea — merge the two panes for KVL and add i₁ − i₂ = I). A current source on an outer edge is a gift: that mesh current is known outright.

Check yourself: in the circuit above, which direction does current actually flow in the shared 4 Ω branch, and what would mesh analysis give if i₂ had come out bigger than i₁?

The branch current is i₁ − i₂ = 3 A in mesh 1's direction (downward through the middle). If i₂ > i₁ the difference would be negative — meaning the real current flows the other way, and that's a perfectly good answer. Negative results are information, not errors (same lesson as the sign convention).

Choosing between the methods

Count the equations each would need: nodal → (nodes − 1), minus one for every voltage source touching ground; mesh → number of window panes, minus one for every outer-edge current source. Pick the smaller count. Rough instinct: current sources → nodal, voltage sources → mesh. But both always work — on an exam, fluency beats optimality.

4 · The theorems: replacing circuits with smaller ones §2.4–2.6

Everything so far solves a circuit as given. Lectures 6–8 add a different power: rewriting a circuit into a simpler one that behaves identically. Four rewrites and one bookkeeping principle.

Source transformation — the warm-up rewrite

A voltage source V in series with R is indistinguishable, from its two terminals, from a current source I = V/R in parallel with the same R. Check the two extremes: open-circuited, both show voltage V = IR; short-circuited, both push I = V/R. Same behaviour at the ends, and (being linear) everywhere between. Use it to massage a circuit toward whichever method you prefer.

+− V R ab ⇄ I R I = V / R ab
Identical twins, as seen from terminals a–b. Note the R moves from series to parallel when the source changes uniform — that swap is the half everyone forgets.

Thevenin's theorem — the big one

Here is the module's most-used result. Take any linear two-terminal network — dozens of sources and resistors, arbitrary mess — and as far as the outside world can tell, it is exactly equivalent to one voltage source Vth in series with one resistor Rth.

Why you should care: because circuits are usually "a big network driving one interesting element." Thevenin shrinks the big network to two components, once, and then every question about the interesting element becomes a one-loop Module 1 problem. Change the load, reuse the same equivalent — that's the whole workflow of amplifier design later.

Finding the two numbers:

Worked slowly, with pictures. The network: a 12 V source in series with 4 Ω reaching node a; an 8 Ω from a down to ground; the terminals we care about are a–b.

+− 12 V 4 Ω 8 Ω ab the whole network ≡ +− 8 V 8/3 Ω ab two components
No load can tell these apart. Attach anything you like across a–b and it behaves identically — which is why you compute the equivalent once and reuse it for every load.

Finding Vth. Leave a–b open. Nothing is connected there, so no current flows out of node a — which means the 12 V simply divides across the 4 Ω and 8 Ω in series. (That "no current flows into an open branch" step is the picture from Reading circuits §5.) So Vth = 12 × 8/(4+8) = 8 V.

Finding Rth. Kill the independent source — a voltage source becomes a wire — and look back in through the terminals:

4 Ω 8 Ω ab 12 V source → wire look in
With the source shorted, the 4 Ω and the 8 Ω both run from node a to node b — the node test again — so they are in parallel: Rth = (4·8)/(4+8) = 32/12 = 8/3 Ω.
Classic trap

Reading the killed-source picture as "4 Ω in series with 8 Ω" because that's how they sat in the original drawing. Once the source becomes a wire, the left rail joins the bottom rail into one node — the topology genuinely changed. Re-trace the nodes after killing sources, every time. This single mistake produces more wrong Rth values than anything else in the module.

The cross-check. Short a to b instead: now the 8 Ω has a wire across it, so it's bypassed entirely (Reading circuits §5 again), leaving isc = 12/4 = 3 A. Then Rth = Vth/isc = 8/3 Ω ✓ — agrees, so both numbers are trustworthy.

Norton's theorem is the same result wearing the other uniform: a current source IN = isc in parallel with the same Rth. Thevenin ⇄ Norton is just one source transformation. Here: 3 A in parallel with 8/3 Ω.

Check yourself: 6 V source in series with 1 kΩ to node B; 2 kΩ from B to ground; terminals B–ground. Find V_th and R_th.

Open-circuit divider: Vth = 6 × 2/(1+2) = 4 V. Kill the source: Rth = 1 kΩ ∥ 2 kΩ = 2/3 kΩ ≈ 667 Ω. (Cross-check: isc = 6 V/1 kΩ = 6 mA; 4 V / 6 mA = 667 Ω ✓.)

Maximum power transfer — a calculus payoff

Connect a load RL to a Thevenin equivalent. Which RL extracts the most power? Too small → big current but tiny load voltage; too big → the opposite. The sweet spot, found by writing P = Vth2RL/(Rth+RL)2 and setting dP/dRL = 0 (the notes page unpacks the differentiation — your MATH drill in action):

RL = Rth ⟹ Pmax = Vth24Rth

For our example: RL = 8/3 Ω, Pmax = 64/(32/3) = 6 W. One honesty note the exam likes: at matched load, half the power dies in Rth — maximum power ≠ maximum efficiency (efficiency there is exactly 50%).

Superposition — one source at a time

Linear circuits obey a beautiful accounting rule: the response (any voltage or current) equals the sum of the responses to each independent source acting alone, with the others killed (same killing rules: V→short, I→open). Complex circuit, several sources → several easy circuits, added up.

Mini-example: a 12 V source in series with 4 Ω feeds node a; a 3 A source also feeds node a; an 8 Ω runs from a to ground. One circuit becomes two easy ones:

① everything on +− 12 V 4 Ω 8 Ω 3 A a va = 16 V ② 12 V alone +− 12 V 4 Ω 8 Ω 3 A → open v′ = 8 V ③ 3 A alone 4 Ω 8 Ω 3 A 12 V → wire v″ = 8 V
Kill one source, solve, kill the other, solve, add. A killed voltage source becomes a wire (③, rust); a killed current source becomes a gap (②, hollow terminals). Getting those two the wrong way round is the standard superposition error.

Panel ②, 12 V alone: the 3 A branch is an open gap, so no current leaves node a that way and the 12 V just divides across 4 Ω and 8 Ω — v′ = 12 × 8/12 = 8 V. Panel ③, 3 A alone: with the 12 V shorted to a wire, the 4 Ω now runs from a to ground alongside the 8 Ω, so the 3 A pushes into 4 ∥ 8 = 8/3 Ω, giving v″ = 3 × 8/3 = 8 V. Add them: va = 8 + 8 = 16 V.

Confirm with one nodal equation on the original: (12 − v)/4 + 3 = v/8. Multiply by 8: 2(12 − v) + 24 = v → 48 = 3v → v = 16 V ✓.

Two rules that save marks: dependent sources are never killed — they stay on in every partial circuit; and power does not superpose (it's quadratic: here the true power in the 8 Ω is 16²/8 = 32 W, nothing like 8²/8 + 8²/8 = 16 W). Superpose voltages and currents only; compute power at the end, from totals.

Check yourself: to "kill" sources when finding R_th or superposing — what does a voltage source become, and what does a current source become? And which sources never get killed?

Voltage source → short circuit (a wire: it enforced a voltage of… whatever; killed, it enforces 0 V, which is a wire). Current source → open circuit (killed, it pushes 0 A — a gap). Dependent sources are never killed, in either procedure — they're formulas, not independent energy inputs.

One video, if you want one

Nodal Analysis for Circuits Explained (Engineer4Free, ~8 min) runs the §2 recipe on a worked circuit at whiteboard pace — useful if you want to watch the equations being written rather than read them. Watch it once, after §2. It sticks to plain nodal analysis and doesn't reach supernodes, so there's nothing off-syllabus to stop for; supernodes stay with your tutorial sheet.

5 · Dependent sources in every method §1.8, §2.1–2.6

Here is a fact about the past mid-sem papers that should shape your revision: almost every Module 2 question has a diamond in it. A Norton equivalent with a "2.5vx" source, superposition with a "4i" source, a mesh problem with a current-controlled source on a shared branch. The methods above don't change at all — there is exactly one new habit, plus one new way of finding Rth. That is the whole of this section.

Recall from Module 1 what the diamond is: a source whose value is a formula in some other quantity of the circuit — 2ix, 0.5vx. It is not an energy input you can switch off; it is a rule the circuit obeys (it models the inside of a transistor or op-amp, which is why the course cares).

The one new habit: write it like a source, then add its controller equation

In nodal or mesh analysis, treat the diamond exactly like an ordinary source of the same kind — a current diamond contributes its current to a KCL equation, a voltage diamond contributes its voltage to a KVL equation. Then write one extra equation: the controlling quantity (ix or vx) expressed in terms of your unknowns (node voltages or mesh currents). Substitute it in, and you are back to an ordinary system with the ordinary number of unknowns.

Watch it on the smallest possible circuit:

+− iₓ 10 V 2 Ω 6 Ω 2iₓ a
One unknown node voltage va. The diamond pushes 2ix up into node a — and ix is measured back in the 2 Ω.
  1. KCL at a, diamond treated as a normal source: in = out gives ix + 2ix = va/6.
  2. Controller equation: ix is the current through the 2 Ω from the source's top (10 V) to node a, so ix = (10 − va)/2.
  3. Substitute and solve: 3(10 − va)/2 = va/6. Multiply both sides by 6: 9(10 − va) = va, so 90 = 10va and va = 9 V. Then ix = 0.5 A and the diamond pushes 1 A. Check KCL: in 0.5 + 1 = 1.5 A, out 9/6 = 1.5 A ✓.

Mesh analysis works the same way: a voltage diamond such as 3i goes into a KVL walk as a rise or drop like any battery, and the controller equation writes that i in mesh currents (if it sits on a shared branch it is a difference of two mesh currents).

Supernode and supermesh with a diamond. Nothing new — combine the two ideas. A voltage diamond floating between two non-ground nodes makes a supernode whose constraint is va − vb = (the diamond's formula); a current diamond on a border between two meshes makes a supermesh whose constraint is i₁ − i₂ = (the diamond's formula). Then add the controller equation as usual. Count equations before you start: one per unknown, plus one controller equation per diamond.

Check yourself: a single loop has a 20 V source, a 3 Ω resistor, and a current-controlled voltage source of value 2i, where i is the loop current and the diamond's + terminal is the one the current enters. Find i.

The current enters the diamond's + terminal, so walking with the current it is a drop of 2i, just like a resistor. KVL: 20 = 3i + 2i, so i = 4 A. Notice the diamond behaved exactly like a 2 Ω resistor here — that is a useful way to see dependent sources, and it is the idea behind the test-source method below.

Thevenin and Norton: three routes to Rth

Vth (open-circuit voltage) and IN (short-circuit current) are found exactly as before — the diamond stays in the circuit and you solve with nodal or mesh plus its controller equation. The question is Rth, and there are three routes:

RouteHowWhen it is allowed
1 · Kill and reduceKill independent sources, series/parallel what's leftOnly when there are no dependent sources
2 · Voc/IscSolve the circuit twice: terminals open, then shortedWhenever there is at least one independent source
3 · Test sourceKill the independent sources only, attach a 1 A (or 1 V) source at the terminals, solve for the other quantity: Rth = vT/iTAlways — and the only route when the network has no independent source

Why route 1 fails with a diamond: its current or voltage depends on what happens elsewhere, so it is neither a wire nor a gap — you can't replace it with either. You must keep it and let the equations decide. Why route 3 is needed: a network made only of resistors and diamonds has nothing driving it, so Voc = 0 and Isc = 0, and 0/0 tells you nothing. So you drive it yourself with a test source and see how it responds — the ratio of your push to its response is its resistance. (Why 1 A? Any value works, because everything in the circuit scales with it; 1 A just makes the division trivial.)

+− 6 Ω +− vₐ 3 Ω 0.5vₐ ab 1 A test
No independent source anywhere — so attach one (accent). Push 1 A into a, find va, and Rth = va/1 A.

Run it. KCL at a: the 1 A test current leaves through the 6 Ω and through the 3 Ω branch. The 3 Ω has va at its top and 0.5va at its bottom (the diamond's + terminal), so it carries (va − 0.5va)/3:

1 = va6 + 0.5va3 = va6 + va6 = va3 ⟹ va = 3 V, Rth = 3 Ω

Had you ignored the diamond and treated the 3 Ω as going straight to ground, you'd have said 6 ∥ 3 = 2 Ω — wrong. The diamond "props up" the bottom of the 3 Ω, so less current flows through it and the network looks more resistive. The notes page has two exam-level versions of this (worked examples 4 and 5).

Check yourself: a network contains a 12 V source and a VCCS. Which R_th routes may you use? And a second network contains only resistors and a CCVS — which route now?

First network: route 2 (Voc/Isc) or route 3 (kill the 12 V to a wire, keep the VCCS, attach a test source). Never route 1. Second network: only route 3 — with no independent source, Voc = Isc = 0, and the Thevenin equivalent is just Rth with no source at all.

Superposition with a diamond on board

Superposition sums the effects of the independent sources, one at a time. The diamond is not one of them — it is part of the circuit's wiring rules — so it stays on in every partial circuit, with its formula now written in that partial circuit's own controlling variable (ix′ in the first, ix″ in the second). Each partial circuit then needs its controller equation, which is why exam superposition questions with a diamond are really "two small nodal problems." A diamond's value can even come out negative in one partial circuit — that just means it pushes the other way there. Worked example 6 on the notes page shows the whole thing, including what goes wrong if you kill the diamond.

Power of a dependent source

Exactly the Module 1 rule, p = vi with the passive sign convention: if current enters the diamond's + terminal it absorbs vi; if current leaves its + terminal it delivers vi. For a current diamond you need its terminal voltage (from your node voltages); for a voltage diamond you need its current. In the first example of this section: the diamond pushes 1 A up out of its top, and its top is at 9 V above ground, so it delivers 9 × 1 = 9 W. Audit: the 10 V source delivers 10 × 0.5 = 5 W; the resistors absorb 0.5² × 2 + 9²/6 = 0.5 + 13.5 = 14 W = 5 + 9 ✓. Diamonds can deliver power — they model transistors, which draw it from a supply the diagram doesn't show.

Check yourself: in the test-source figure above (with v_a = 3 V), how much power does the 0.5v_a diamond absorb or deliver?

Diamond voltage 0.5 × 3 = 1.5 V (+ on top). The 3 Ω carries (3 − 1.5)/3 = 0.5 A downward, so that 0.5 A enters the diamond's + terminal: it absorbs 1.5 × 0.5 = 0.75 W. Audit: test source delivers 3 × 1 = 3 W; 6 Ω takes 3²/6 = 1.5 W, 3 Ω takes 0.5² × 3 = 0.75 W, diamond 0.75 W — total 3 W ✓.

6 · You're ready — what to do next

That's lectures 4–8: two systematic solvers and five rewriting tools. This module rewards reps more than any other — the methods only feel mechanical after you've run them a dozen times:

Still stuck on something? Ask an AI well

"I'm learning nodal analysis from Bobrow & Gupta §2.1–2.2 (EEE U111, BITS). Give me a two-node circuit with one current source and one voltage source to ground. Make me write each KCL equation myself before you show yours, then check my solution."

"Walk me through finding a Thevenin equivalent when the circuit contains a dependent source — why the killed-sources shortcut fails and how V_oc/I_sc works instead. One small example, step by step, quizzing me as we go."

Caution: AI circuit answers frequently drop a sign on shared mesh branches — verify anything it solves with a power audit before trusting it.